• Ongoing Project:
    Productive4.0

    Digitalization of the European Industry
    Fraunhofer Gesellshaft
    Airbus Group
    Thales
    BMW - Bayrische Motoren Werke AG
    Volvo Technology AB Sweden
    NXP Semiconductors Germany GmbH
    Ericsson
    SAP AG
    Philips Lighting B.V. Nederlands
     Robert Bosch GMBH
    ABB AG

    Find out more...

  • Ongoing Project:
    SCOTT

    Building Trust in the Internet of Things
    Embraer
    NXP Semiconductors
    Nokia
    Ericsson
    Siemens AG
    Philips Nederland
     Robert Bosch GMBH

    Find out more...

  • Ongoing Project:
    ENABLE-S3

    Novel Validation Procedures for Highly Automated Systems
    Thales
    Airbus Defence & Space
    Siemens AG
    Philips Nederland
    Renault SAS
    Toyota Motor Europe

    Find out more...

Gallery of Hosted Conferencesmore

Latest Newsmore

12, Feb, 2019

Activities in the Academia

Computer Science department delivers Best Student Awards

30, Jan, 2019

Industry Collaborations

CISTER Researchers participated on CoLAB meeting, in Lisbon

24, Jan, 2019

Achievements in Academia

José Fonseca successfully defended his PhD thesis at FEUP

24, Jan, 2019

Fundamental Research Activities

Robert I. Davis gave a talk on "Transferring Real-Time Systems Research into Industrial Practice"

14, Dec, 2018

Fundamental Research Activities

CISTER has great participation in RTSS 2018

11, Dec, 2018

Fundamental Research Activities

CISTER Researcher participated in the last General Assembly of ENABLE-S3 project

28, Nov, 2018

Achievements in Academia

Paper on "Uneven memory regulation for scheduling IMA applications on multi-core platforms" published

CISTER Researchers Ali Awan, Pedro Souto, Benny Åkesson, Konstantinos Bletsas and Eduardo Tovar have published the journal paper on "Uneven memory regulation for scheduling IMA applications on multi-core platforms".
It considers a scheduling arrangement with partitioned ser vers and memory access regulation, and its schedulability analysis. The main novelty over the state-of-the-art is that the servers use EDF and the periodic memory access budgets are uneven in the general case and defined on a per-server basis (rather than per-core).
 

22, Nov, 2018

Fundamental Research Activities

CISTER Researchers partipated on EFECS 2018, in Lisbon

CISTER Researchers Eduardo Tovar, Luis Lino Ferreira and Ricardo Severino, attended EFECS 2018, that took place at the Lisbon Congress Centre - CCL .

EFECS 2018 is an international forum with a focus on 'Our Digital Future' along the Electronic Components and Systems value chain in Europe.
The organisers of this event, AENEAS, ARTEMIS-IA, EPoSS, ECSEL Joint Undertaking and the European Commission, in association with EUREKA, have joined forces to provide numerous opportunities to learn more about the latest developments, cooperation and funding possibilities in the ECS Community.
Several projects with CISTER participation were presented in the event, in the form of posters or in the form a small pitches. Additionally, CISTER members participated in several consortium building meetings, which will target the next Eureka and ECSEL calls.

Ongoing ECSEL Projects at CISTER:
Productive 4.0
SCOTT
ENABLE-S3
SafeCOP


21, Nov, 2018

Fundamental Research Activities

Cláudio Maia, participated in the 5th edition of "AED Days", in Oeiras

15, Nov, 2018

Fundamental Research Activities

Sanjay K. Jha gave a CISTER distinguished seminar on Security in Internet of Things (IoT)

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